中古 LTX-CREDENCE Quartet One #9268099 を販売中

Tester, 8" 192 Channels Tester type: Mixed signal VLSI test system 2 Sites Prober type: TEL / TOKYO ELECTRON P-8 Remote operation Digital DC PMU: PMU Per 8-digital pins Measure voltage range / Accuracy: Range: -2.5 V % 7.5 V No resolution Accuracy: ± 9.76 mV Force voltage and measure current: Range / Accuracy 100 nA / - / ±500 pA 1 µA / - / ±2.5 nA 10 µA / - / ±25 nA 100 µA / - / ±250 nA 1 mA / - / ±2.5 µA 25 mA / - / ±50 µA 100 mA / 0.061% of Range / ±500µA Force voltage mode: Range / Accuracy -2.5 V % 7.5 V / 2.54 mV Force current and measure voltage: Range / Resolution / Accuracy 100 nA / - / ±15 nA 1µA / - / ±150 nA 10 µA / - / ±1.5 µA 100 µA / - / ±15 mA 25 mA / - / ±150 µA 100 mA / 0.508% of Range / ±2.5 A DPS: (4) Supplies Voltage supplies: Vmax / ImaxAccuracy 7.5 V / 4 A / - 15 V / 2 A / - 30 V / 1 A / ± (0.055% of value + 0.07% of FS) Current supplies: Vmax / Imax 200 mA / 30 V Current limit: Range / Resolution / Accuracy 200 mA / - / - 20 mA / - / ±(0.11% of value + 2 mA / - / 0.1 µA/V + 0.06% of range + 2µA) Digital timing and pattern generation: Data rate: 200 MHz Data I/O 400 MHz Data NRZ output mode (16) Sets of (10) edges per pin Selection (Normal mode): (4) Bits per 128 pins Alternate mode: (4) Bits per pin, selectable from pins own pattern data Cycle length timing sets: (16) Sets per 128 pins Cycle time period: Minimum / Maximum / Resolution 10nSec / 327.6µSec / 62.5pSec (10) Edges per pin Programming res: 60ps Placement accuracy: ±175ps Inhibit edge placement accuracy: ±175ps Accuracy: ±175ps Broadside pattern depth: (4) Bits per I/O pin by 8, 15, 32 or 64 M rows 128 Pins: 64M 64M (2) 32M (4) 16M (8) 8M 128 Pins: 128M 128M (2) 64M (4) 32M (8) 16M Digital pin driver: Range / Resolution / Accuracy -2.5 V % 7.5 V / 2.54 mV / ±10 mV Programming sources: (4) Pairs of rails Driver current limit: ±100 mA Maximum Dynamic source impedance: 50Ω programmable 5V Pulse rise / Fall time: <1.05 ns ± 20% 3V Pulse rise / Fall time: <1.05 ns ± 20% Width / Edge separation: 2.5 ns at 3V step guaranteed edge placement: 3.5 ns at 3 V step On, 5V step: 2.25 ns maximum Driver formats: Pulse 1, DDE, Alternate F Inhibit formats: Alternate Digital pin comparator: Comparator modes: Latched double strobe Range / Resolution / Accuracy -2.3 V % 7.3V / 2.44 mV / ±25 mV Compare level programming: Independent, high & low setting per pin Comparator overdrive: 50 mV (Typ 20 mV) Overdrive sensitivity: 75ps/V maximum Threshold level sensitivity: 50ps/V maximum Overall system response bandwidth: 600 MHz at -3 dB typical Pulse width: 2.5 ns Pulse width: 1.5 ns Achievable window width: 1 ns Window separation: 5.0 ns, 3.5 ns Typical Comparator formats: Tristate, ALT, compare, FI_Sele, FI_Partner Active loads: Types: Pull-ups, Pull-down Pull-up (source) current:0 % - 25 mA Pull-up voltage: -2.5 V %1.5 V Pull-down (sink) current: 0 % 25 mA Pull-down voltage: +2.0 V % 7.5 V Programming resolution: 1µA, 10 mV Programmable voltage compliance clamps V-high (Pull-up): Range / Resolution / Accuracy 0V % 7.5V / 2.54 mV / +800 mV / -100 mV Accuracy: 25 mA/pin or 100 mA / Pin card Programmable voltage compliance clamps V-low (pull-down) Range / Resolution / Accuracy -2.5V % 5.0V / 2.54 mV / +100 mV/-800 mV Accuracy: 25 mA / pin or 100 mA / pin card Achievable continuous current: 200 mA / Pin card Settling time: 4 ms / maximum Pin electronic interface: I/O Channel capacitance: 53pF ± 2.5pF I/O Channel lumped capacitance: 7.5pF ± 1.5pF Dynamic input resistance: 2.5 M minimum I/O Path channel noise: 40 mV p-p maximum Dut power interface: (10) Power supplies Connections: (4) Wires, kelvin sensed Power supply interface: 6 A Memory: CPU Memory size: 130604 KB Large Vector Memory (LVM): 8M Subroutine Vector Memory (SVM): 1000 Manipulation Within test program Data collection: STDF ASCII File No invantest (Former KLA-TENCOR) Debug tools: PatDebug Shmoo PatEdit Showtool Calcsheet Specsheet.